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ARM Cortex-M: PendSV Context Switch Intro

Technical mental model

PendSV is commonly used for deferred context switching because it can run at low priority and avoid disrupting urgent interrupts. Correctness depends on precise save/restore sequencing.

Key low-level points:

Equations and constraints that drive decisions

Switch-time decomposition:

Tswitch=Tsave+Tselect+TrestoreT_{switch} = T_{save} + T_{select} + T_{restore}

Where:

Implementation walkthrough

Save current task context into its TCB before any next-task pointer mutation.

Run deterministic task selection with bounded execution time.

Restore next task context in reverse order of save contract.

Trace one full switch in debugger and verify register parity.

Validation and debugging checklist

Incorrect register order is a high-probability hard fault source.

Scheduler pointer races produce intermittent corruption symptoms.

FPU-enabled builds require additional context policy decisions.

ISR nesting assumptions must match mask/priority configuration.

A robust PendSV path is one where every saved field has one unambiguous restore point.


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