From concept to engineering model

Cortex-M follows a load/store model: arithmetic happens in registers, while memory is accessed explicitly. Correct branch reasoning depends on understanding both addressing and flag state.

Effective address formation is explicit and should be reviewed as carefully as arithmetic expressions.

Condition flags are part of control state and can be overwritten by many instructions.

Branch direction correctness often fails at signed/unsigned compare boundaries.

Mathematical relationships worth memorizing

Effective address model:

Where:

• $A_{eff}$: memory address used by load/store

Loop cycle estimate:

Where:

• $n$: iterations

Applied design scenario

1. Write test loops that expose first/last iteration behavior explicitly.
2. Track flag-setting instructions and verify which branch consumes each flag state.
3. Use watchpoints on destination memory in critical write paths.
4. Separate signed and unsigned compare paths in assembly reviews.

Mistakes to prevent before hardware or runtime tests

• Misaligned assumptions can break portability and performance.
• Stale flags after unrelated arithmetic produce misleading branch results.
• Off-by-one branch conditions are common in hand-written loops.
• Do not infer memory safety from successful short-run tests only.

High-confidence assembly work comes from explicit address math plus explicit branch condition tracing.